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Gps: Understanding cuda


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GPS: Understanding CUDA


Sreedevi Gurusiddappa Eshappa

Computer Science Department


San Jose State University
San Jose, CA 95192
408-893-9454

sreedevige@gmail.com


ABSTRACT

CUDA (Compute Unified Device Architecture) is NVIDIA’s new high performance GPU architecture. This paper presents CUDA’s architecture, advantages of CUDA architecture over traditional architecture, CUDA Memory Management, Building blocks of CUDA namely Threads, Blocks, Grids and simple examples using CUDA C language.




  1. INTRODUCTION




    1. GPUs

Graphics Processing Unit (GPU) is a specialized processor used to render real-time high-resolution graphics. Current GPUs are highly evolved multi-core systems performing efficient manipulation of large blocks of data.

GPU have high computational density, 100s of ALUs and memory bandwidth. GPUs can run 1000s of concurrent threads to hide latency, so can deliver high throughputs.


1.2 Heterogeneous computing
Heterogeneous computing refers to use of more than one type of processor to perform the system tasks. General purpose CPUs like Intel Core2 Duo and AMD Opteron are good at performing one or two tasks relatively quickly. GPUs are good at doing massive number tasks at the same time, and doing those tasks relatively quickly. GPU while used to render graphics, can also perform highly parallel processing on large data sets, where as CPUs perform normal Operating system and other serial tasks.

Some of the examples of CPUs are Intel Core i7-4790K, Intel Core i5-4690K, AMD FX-6300 Vishera


Examples of GPUs are GeForce 6600GT (NV43), GeForce GTX… etc.
1.3 CUDA

NVIDIA graphic cards are very powerful and possess high computational capabilities. For example, consider a 20-inch monitor with a standard resolution of 1920x1200. An NVIDIA graphics card can calculate the color of 2304000 pixels many times a second. NVidia graphics card contains 100s of ALU and these ALUs are fully programmable, allowing developers to harness vast amounts of computations power into the programs.


CUDA stands for Compute Unified Device Architecture. It’s a parallel computing platform and programming model created by NVIDIA and implemented by the Graphic Processing Units (GPUs) that they produce.
Using CUDA, the developer can harness the enormous parallel computing capabilities of the NVIDIA graphics card to perform general-purpose computation.
CUDA supports standard languages like C, OpenCL, DX Compute etc. CUDA is supported on common operating systems like Linux, MacOS and Windows.
2. SIMPLE PROCESSING FLOW IN CUDA
In CUDA, the terminologies used are as below:

Host: Host indicates the CPU and its memory
Device: Device indicates the GPU and its memory
The steps below explain the simple processing flow in CUDA environment,
1] Copy input data from CPU memory to GPU memory: Input data of the program is copied from CPU memory to GPU memory. The parallel code is executed on the GPU.
2] Load GPU program and execute caching data on chip for performance:

The parallel program in CPU is loaded into the GPU and the data in the GPU memory will be used to execute the program. The parallel code would have been CPU intensive and would have taken a long time if executed on CPU.


3] Copy result from GPU memory to CPU memory:

After execution of the parallel code in the GPU, the results reside in GPU memory is copied to the CPU memory using PCI bus. Here we have use the tramendaious power of the GPU to execute the parallel code hence aiding the CPU and its task.




Figure1: Simple Processing Flow in CUDA

3. SIMPLE PROGRAMMING IN CUDA ENVIRONMNET

The Hello World program below explains the difference between the program execution in the normal environment and the CUDA environment.


__global__void mykernel(void) {}
int main(void)

{ mykernel<<<1,1>>>();

printf(“Hello World\n”);

return 0;

}
There are two keywords,

1] __global__ is a keyword that indicates a function that runs on the device and is called from host code.


2] mykernel<<<1,1>>>();
Triple angle brackets mark a call from host code to device code.
Output:

$ nvcc hello.cu

$ a.out

Hello World


Nvcc is NVIDIA C complier, which separates source code into host and device components. The device function, mykernel() processed by the NVIDIA complier. Host function, main() processed by standard host compilers like gcc, cl.exe
4. BUILDING BLOCKS OF CUDA

4.1 Kernels

Parallel portions of an application are executed on the device as kernels. Kernels execute one each at a time. More than one thread executes each kernel.



4.2 Threads

Threads are the single process of the program. Group of threads is a block. Each Thread is identified by a unique number. Threads of CUDA and CPUs are different, CUDA threads are extremely lightweight. They have very little creation overhead and they are fast switching.

CUDA achieves efficiency by running 1000s of threads at a time whereas in multi-core processors only a few threads can execute at a time.

Array of threads in the CUDA execute the kernel. All the threads in the array run the same code. Each thread is identified by a unique ID. This ID will be used to compute memory address and make control decisions.





Figure2: Thread ID



4.3 Grid

Group of blocks is a grid. Kernel launches a grid of blocks.




Group of threads within the block can cooperate with each other. But threads in the different block cannot cooperate with the thread in the different blocks.
Figure3: Grid
5. THREAD COOPERATION

CUDA’s main feature is the thread cooperation. In a program several threads may have to access the same memory location. In CUDA, due to thread cooperation threads can cooperate on memory access, which will result in reduction of bandwidth. In several threads most of the initial computation is common. Threads cooperating with each other can share results to avoid redundant computation.


5.1 Transparent scalability:

Thread blocks can be scheduled on any processor by hardware.

Below figure shows the transparent scalability


Figure4: Shows thread block schedule
5.2 Multidimensional IDs

Threads and blocks have different dimensional Ids.Block IDs are single or double dimensional. Thread IDs are single, double or three-dimensional. Different dimensions of Ids help when processing multidimensional data by simplifying memory addressing. For example, image processing, solving PDEs (Partial Differential Equations) on volumes.


6. MEMORY MANAGMENT

The diagram below explains the memory architecture of a GPU. The GPU has its own memory. Though the amount of memory is less (from 768 MB to 64 G of DDR3 memory), the memory bandwidth is substantially higher. CUDA capable GPU have a fully coherent high bandwidth L2 cache. CUDA GPUs have 16 streaming processors (SMs) with their own smaller non-coherent L1 cache.

As noted above, Device and host memories are different. In the program, device pointers point to the GPU memory and host pointers point to the CPU memory. Data can be passed from host code to device memory or vise versa. But data in the device memory cannot be processed in the host and same as data in host memory.
To handle the device memory there are some CUDA APIs, which are similar to the C language.

cudaMalloc(), cudaFree(), cudaMemcpy()


Figure5: Memory Management
7. PARALLEL PROCESSING

Parallel processing of the GPU CUDA is explained using vector addition program. GPU has massive parallelism. Running parallel process is simple, instead of executing one function at a time, execute it ‘N’ times in parallel just by replacing ‘1’ by ‘N’, is as shown below,

add<<<1,1>>>();

add<<>>();




7.1 Vector Addition On The Device

Parallel processing of the CUDA is explained using vector addition program.

In parallel processing, add() function will run in parallel for vector addition. For each invocation of add() function will refer to as a block. Block index “blockIdx.x”

will be used to identify the each block.


__global__ void add(int *a, int *b, int *c)

{ c[blockIdx.x] = a[blockIdx.x] +

b[blockIdx.x];

}
Each block handles different indexes using blockIdx.x to index into the array.Different blocks in device can execute in parallel, is as shown below.


Block1


C[0] = a[0] + b[0];


Block2



C[1] = a[1] + b[1];

Block3



C[0] = a[0] + b[0];

Block4



C[0] = a[0] + b[0];

Below program explains how the vector addition takes place in the device,


#define N 512

int main(void)

{ int *a, *b, *c; //host copies of a, b, c

int *d_a, *d_b, *d_c; //device copies of



a, b, c

int size = N* sizeof(int);




// Allocate space for device copies of a, b, c

cudaMalloc((void**) &d_a, size);

cudaMalloc((void**) &d_b, size);

cudaMalloc((void**) &d_c, size);



//Allocate space for host copies of a, b, c and setup input values

a = (int*) malloc(size); random_ints(a, N);

b = (int*) malloc(size); random_ints(b, N);

c = (int*) malloc(size);



// copy inputs to device

cudaMemocpy(d_a, a, size, cudaMemcpyHostToDevice);

cudaMemocpy(d_b, b, size, cudaMemcpyHostToDevice);

//Launch add() kernel on GPU with N blocks

add<<<N, 1>>> (d_a, d_b, d_c);



//copy result back to host

cudaMemory(c, d_c, size, cudaMemcpyDeviceToHost);



//Cleanup

free(a); free(b); free(c) ;

cudaFree(d_a); cudaFree(d_b); cudaFree(d_c);

return 0;

}

8. ADVANTAGE AND DISADVANTAGES OF CUDA



8.1 Advantages

1] CUDA is mostly well suited for highly parallel algorithms.

2] CUDA is well suited for compute intensive operations. The GPU can handle 32-bit integer and floating point operations.

3] CUDA is very suitable to handle large datasets. While working on a large datasets, the L2 cache of the CPU is not very useful. The GPU memory interface uses parallel interfaces to connect with its memory. For example: 12-bit interface is used on GTX 280 to access its high performance GDDR-3 memory. This interface is 10 times faster and hence more efficient.



8.2 Disadvantages

1] CUDA architecture doesn’t support the full C language. It runs CPU code through a C++ complier, which inturn makes the valid C code to fail to compile.


2] To efficiently run a GPU, there is need for many hundreds of threads. If the problem does not have many hundreds of threads, then CUDA might not be very useful.

3] For the compilation of the code need to use only NVIDIA complier.



9. CONCLUSION

CUDA is advanced parallel processing architecture. This project gave in-depth knowledge about CUDA architecture and how parallel processing takes place in GPUs. Thanks for the Prof. Robert Chun to providing us to work on different parallel processing concepts.


10. REFERENCES

[1] Sarah Traiq, NVIDIA Corporation, An Introduction to GPU Computing and CUDA Architecture, NVIDIA Corporation 2011

[2] CUDA Programming Model Overview presentation

[3] Memory Management explanation by, http://supercomputingblog.com/cuda/cuda-memory-and-cache-architecture/#more-347



[4] CUDA simple processing flow, advantages and disadvantages of CUDA by, http://en.wikipedia.org/wiki/CUDA


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