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Embedded biostm 1 The Full-Featured bios for Embedded Systems and Consumer Electronics* bios user’s Manual with bios interrupt Reference


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Embedded BIOStm 4.1


The Full-Featured BIOS for Embedded Systems and Consumer Electronics*
BIOS User’s Manual with BIOS Interrupt Reference

Copyright (C) 1990-1998 General Software, Inc.

All rights reserved.

TABLE OF CONTENTS


KEY EMBEDDED BIOS CONCEPTS 7

1.1 Architectural Overview 7

1.1.1 Memory Model 8

1.1.1.1 The Interrupt Vector Table 8

1.1.1.2 The BIOS Data Area 8

1.1.1.3 Free Low RAM 8

1.1.1.4 The Extended BIOS Data Area 9

1.1.1.5 Expanded Memory 9

1.1.1.6 Video ROM Extensions 9

1.1.1.7 Other ROM Extensions 9

1.1.1.8 The System ROM 10

1.1.1.9 Extended Memory 10

1.1.1.10 CMOS Memory 10

1.1.2 Interrupt Model 10

1.1.2.1 BIOS Service Interrupts 12

1.1.2.1.1 INT 10h, Video Services 12

1.1.2.1.2 INT 11h, Equipment List Service 13

1.1.2.1.3 INT 12h, Low Memory Size Service 13

1.1.2.1.4 INT 13h, Disk Services 14

1.1.2.1.5 INT 14h, Serial Port Services 16

1.1.2.1.6 INT 15h, General System Services 17

1.1.2.1.7 INT 16h, Keyboard Services 18

1.1.2.1.8 INT 17h, Parallel Port Services 19

1.1.2.1.9 INT 18h, Boot Fault Routine 19

1.1.2.1.10 INT 19h, Bootstrap Routine 19

1.1.2.1.11 INT 1ah, Time/Date Services 20

1.1.2.2 Table Pointers 21

1.1.2.2.1 INT 1dh, Video Parameter Table (VPT) 21

1.1.2.2.2 INT 1eh, Floppy Diskette Parameter Table (DPT) 21

1.1.2.2.3 INT 1fh, Video Graphics Character Table (VGCT) 22

1.1.2.2.4 INT 41h/46h, Fixed Disk Paramter Tables (FDPTs) 22

1.1.2.3 BIOS Upcalls 23

1.1.2.3.1 INT 15h Device Management 23

1.1.2.3.1.1 INT 15h Function 4fh 23

1.1.2.3.1.2 INT 15h Function 90h 24

1.1.2.3.1.3 INT 15h Function 91h 24

1.1.2.3.1.4 INT 15h Function 85h 24

1.1.2.3.2 INT 1bh Control-Break Signal 25

1.1.2.3.3 INT 1ch User Timer Interrupt 25

1.1.2.3.4 INT 4ah Real Time Software Interrupt 25

1.1.2.4 CPU Traps/Faults 25

1.1.2.5 Hardware Interrupts 27

1.10.3 System Configuration Table 27

1.11 Console I/O Redirection 28

1.11.1 Video (INT 10h) Redirection 28

1.11.2 Keyboard (INT 16h) Redirection 29

1.12 Integrated BIOS Debugger 29

1.18 Protected Mode Support 30



THE INTEGRATED BIOS DEBUGGER 31

2.1 How to Use the Debugger 31

2.2 Debugger Command Syntax 32

2.2.1 Operand Types 32

2.2.2 Expressions 32

2.2.3 Addresses 33

2.3 Command Reference 34

2.3.1 ? Command 34

2.3.2 + Command 34

2.3.3 - Command 35

2.3.4 BC Command 35

2.3.5 BIOSDATA Command 35

2.3.6 BL Command 36

2.3.7 BP Command 36

2.3.8 CIS Command 37

2.3.9 CONSOLE Command 37

2.3.10 CSR Command 37

2.3.11 CSW Command 38

2.3.12 D Command 39

2.3.13 DA20 Command 39

2.3.14 DB Command 39

2.3.15 DCACHE Command 40

2.3.16 DD Command 40

2.3.17 DW Command 41

2.3.18 E Command 41

2.3.19 EA20 Command 42

2.3.20 ECACHE Command 42

2.3.21 EFL Command 43

2.3.22 G Command 43

2.3.23 HELP Command 43

2.3.24 I Command 44

2.3.25 ID Command 44

2.3.26 IW Command 45

2.3.27 LFL Command 45

2.3.28 MASK Command 45

2.3.29 MODE Command 46

2.3.30 O Command 46

2.3.31 OD Command 47

2.3.32 OW Command 47

2.3.33 PCIR Command 48

2.3.34 PCIW Command 48

2.3.35 R Command 49

2.3.36 R16 Command 49

2.3.37 R32 Command 50

2.3.38 RC Command 50

2.3.39 RD Command 50

2.3.40 REBOOT Command 51

2.3.41 RFL Command 52

2.3.42 SFL Command 52

2.3.43 SO Command 53

2.3.44 T Command 53

2.3.45 TIME Command 54

2.3.46 TORAM Command 55

2.3.47 U Command 55

2.3.48 U16 Command 56

2.3.49 U32 Command 56

2.3.50 UFL Command 57

2.3.51 V Command 58

2.3.52 WATCH Command 58

2.3.53 WC Command 59

2.3.54 WCOMx Command 59

2.3.55 WD Command 60

2.3.56 WFL Command 60

2.3.57 WP Command 61



BIOS FUNCTION REFERENCE 63

3.1 INT 10h, Video BIOS Services 63

3.1.1 Set Video Mode (00h) 63

3.1.2 Set Cursor Size (01h) 64

3.1.3 Set Cursor Position (02h) 64

3.1.4 Read Cursor Position (03h) 65

3.1.5 Read Light Pen Position (04h) 65

3.1.6 Select Video Page (05h) 65

3.1.7 Scroll Up Window (06h) 66

3.1.8 Scroll Down Window (07h) 66

3.1.9 Read Char/Attr From Screen (08h) 66

3.1.10 Write Char/Attr to Screen (09h) 67

3.1.11 Write Character to Screen (0ah) 67

3.1.12 Set Color Palette (0bh) 68

3.1.13 Write Pixel (0ch) 68

3.1.14 Read Pixel (0dh) 68

3.1.15 Write Teletype Mode (0eh) 69

3.1.16 Return Video Status (0fh) 69

3.2 INT 11h, Equipment List Service 69

3.3 INT 12h, Low Memory Size Service 70

3.4 INT 13h, Disk Services 70

3.4.1 Reset (00h) 71

3.4.2 Read Status (01h) 71

3.4.3 Read Sectors (02h) 72

3.4.4 Write Sectors (03h) 72

3.4.5 Verify Sectors (04h) 73

3.4.6 Format Track (05h) 73

3.4.7 Read Drive Parameters (08h) 73

3.4.8 Initialize Hard Disk Controller (09h) 74

3.4.9 Read Long Sectors (0ah) 74

3.4.10 Write Long Sectors (0bh) 75

3.4.11 Seek to Cylinder (0ch) 76

3.4.12 Reset Hard Disk Controller (0dh) 76

3.4.13 Test Drive Ready (10h) 76

3.4.14 Recalibrate Drive (11h) 77

3.4.15 Controller Diagnostic (14h) 77

3.4.16 Read Drive Type (15h) 77

3.4.17 Detect Media Change (16h) 78

3.4.18 Set Diskette Type (17h) 78

3.4.19 Set Media Type for Format (18h) 79

3.5 INT 14h, Serial I/O Services 79

3.5.1 Initialize Serial Port (00h) 79

3.5.2 Send Character (01h) 81

3.5.3 Receive Character (02h) 81

3.5.4 Read Serial Port Status (03h) 82

3.5.5 Extended Initialize Serial Port (04h) 82

3.6 INT 15h, General Services 84

3.6.1 Query Port 92h A20 Gate Capability (24h) 84

3.6.2 Keyboard Intercept Up-Call (4fh) 84

3.6.3 APM Installation Check (5300h) 85

3.6.4 APM Interface Connect (5301h) 86

3.6.5 APM Protected Mode 16-Bit Interface Connect (5302h) 86

3.6.6 APM Protected Mode 32-Bit Interface Connect (5303h) 87

3.6.7 APM Interface Disconnect (5304h) 87

3.6.8 APM CPU Idle (5305h) 88

3.6.9 APM CPU Busy (5306h) 88

3.6.10 APM Set Power State (5307h) 89

3.6.11 APM Enable/Disable APM Functionality (5308h) 90

3.6.12 APM Restore APM Power-On Defaults (5309h) 90

3.6.13 APM Get Power Status (530ah) 90

3.6.14 APM Get APM Event (530bh) 91

3.6.15 System Request Key (58h) 92

3.6.16 Wait Function (86h) 92

3.6.17 Move Extended Memory Block (87h) 92

3.6.18 Extended Memory Size (88h) 93

3.6.19 Switch To Protected Mode (89h) 94

3.6.20 Device Busy Up-Call (90h) 94

3.6.21 Device Interrupt Up-Call (91h) 95

3.6.22 Read/Write CMOS RAM Cell (A0h) 96

3.6.23 Set Console I/O Redirection (A1h) 96

3.6.24 Get Embedded BIOS Version (A3h) 97

3.6.25 Get RFD Drive Information (A400h) 97

3.6.26 RFD Broadcast (A401h) 97

3.6.27 Return System Configuration (C0h) 98

3.6.28 Return Extended BIOS Data Area (C1h) 98

3.6.29 PS/2 Mouse Request (C2h) 99

3.6.30 Watchdog Timer Control (C3h) 100

3.6.31 Checksum Region (C4h) 100

3.6.32 Debugger Breakpoint (D0h) 101

3.6.33 Flash Programming (E0h) 101

3.7 INT 16h, Keyboard Services 102

3.7.1 Read Keyboard Input (00h) 102

3.7.2 Return Keyboard Status (01h) 102

3.7.3 Return Shift Flag Status (02h) 103

3.7.4 Set Typematic Rate (03h) 103

3.7.5 Push Data to Keyboard (05h) 104

3.7.6 Enhanced Read Keyboard (10h) 104

3.7.7 Enhanced Read Keyboard Status (11h) 105

3.7.8 Enhanced Read Keyboard Flags (12h) 105

3.7.9 Set CPU Speed (F0h) 106

3.7.10 Get CPU Speed (F1h) 106

3.7.11 Read Cache Status (F400h) 107

3.7.12 Enable Cache (F401h) 107

3.7.13 Disable Cache (F402h) 108

3.8 INT 17h, Parallel I/O Services 108

3.8.1 Write Character (00h) 108

3.8.2 Initialize Printer (01h) 109

3.8.3 Read Printer Status (02h) 109

3.9 INT 1ah, Time Services 110

3.9.1 Read System Timer Count (00h) 110

3.9.2 Write System Timer Count (01h) 110

3.9.3 Read Real Time Clock Time (02h) 111

3.9.4 Write Real Time Clock Time (03h) 111

3.9.5 Read Real Time Clock Date (04h) 111

3.9.6 Write Real Time Clock Date (05h) 112

3.9.7 PCI Services (B1h) 112


.End Table C.

Chapter 1

KEY EMBEDDED BIOS CONCEPTS


This chapter presents an architectural overview of EMBEDDED BIOS. OEMs with an understanding of these concepts generally produce BIOSes more efficiently in two ways. First, an appreciation of all the functional issues is an important thing to have before starting a design, so that the design can accommodate those issues. Second, with this material as background, the OEM will have a longer view of the adaptation process. Understanding this material will make your adaptation move more smoothy.
1.1 Architectural Overview
EMBEDDED BIOS is functionally similar to the BIOS in a PC, in many ways. First, the BIOS tests and initializes all of the equipment on the system when power is applied. Once the system has been initialized, it transfers control to an operating system or application. Finally, it provides software services through architected mechanisms that allow the operating system and application to manipulate the hardware; for example, to perform floppy disk I/O, read keystrokes from the keyboard, and display characters on a video display.
Because the BIOS is ultimately responsible for managing the hardware, it must implement policies for initialization and management of the devices. For example, the BIOS's memory model determines how much memory will be available to operating systems and applications, and where the memory will be located in the address space.
Similarly, its interrupt model determines the policy used to make interrupt assignments of external hardware devices, establish their priorities, and define how operating system and application software will request services from the BIOS.
The BIOS Power-On Self-Test (commonly, POST) is responsible for testing and initializing the hardware components in the target such as the DMA controllers, interrupt controllers, programmable timers, and other components so that they work together to provide a viable environment. For example, if dynamic RAM (DRAM) is used in a design, it must be periodically refreshed; this is the responsibility of the BIOS. Using configuration options, the developer directs POST to provide refresh through on-board CPU functions, through chipset functionality, or using more elaborate techniques such as tying an 8254 programmable interval timer to an 8237 DMA controller to cause DMA cycles to perform the refreshing. POST sets up the policies to be used for performing DRAM refresh and many other tasks so that operating systems and applications don't have to do these tasks by themselves.
These and many other architectural issues are described in detail in this chapter.
1.1.1 Memory Model
EMBEDDED BIOS employs a memory model that is compatible with desktop PC standards. Because the BIOS is used primarily in a real-mode environment, it does not define any standards for the use of extended memory beyond 1MB. Instead it is concerned with the layout and usage of memory below 1MB in the address space.
Because Intel-architecture processors can be programmed to respond to a variety of different kinds of addresses (physical, linear, virtual, and real-mode addresses), we will refer to 32-bit physical addresses whenever describing where some object is located in the target machine. When referring to how the object is referenced with actual machine instructions, we will use what is called 16:16 notation for addresses. In this format, addresses contain two parts, each 16 bits in width. The first 16-bit entity is a segment address, and the second 16-bit entity is a byte offset relative to the specified segment. A segment address can be transformed into a physical address by multiplying it by 16 (10h in hexadecimal).
1.1.1.1 The Interrupt Vector Table
At physical location 00000000h in the address space is the real-mode Interrupt Vector Table, or IVT. This table is defined by Intel 80x86 architecture and by other PC standards to be an array of far (16:16) pointers to objects, some being Interrupt Service Routines (ISRs), while other elements are pointers to data structures. This table contains 256 elements and each element is four bytes long, so the table is exactly 1KB in size.
1.1.1.2 The BIOS Data Area
The first address immediately following the IVT is 00000400h. Addressed with the equivalent real-mode segment 0040h, the space following the IVT is called the BIOS Data Area, or BDA. The BDA is used by the BIOS to keep track of how the system is configured; i.e., how many serial and parallel ports exist. It is also used to keep track of the state of the running BIOS, such as the track number over which a floppy disk recording head is positioned. The BDA extends up to but not including physical address 00000500h, so that the first free address to be used by operating systems and application program is 00000500h.
A complete map of the BIOS Data Area is presented in Appendix B, in the actual assembly language source code found in EMBEDDED BIOS. All the fields in the BDA are architected by IBM. Slight modifications to this area have been made by other desktop BIOS vendors since PC clones have matured, to accommodate new BIOS functionality. When these modifications become industry-standard on the desktop, they are incorporated into the EMBEDDED BIOS BDA.
1.1.1.3 Free Low RAM
Starting at physical address 00000500h, or segment 0050h, operating systems and user programs use memory as they see fit. The amount of memory, or size of free low RAM (including the IVT and BDA), is kept in the BIOS Data Area by the BIOS itself, and can be retrieved with a BIOS software service (INT 12h.)
1.1.1.4 The Extended BIOS Data Area
The last 1KB of low memory is reserved by the BIOS for extending the BIOS Data Area without interfering with the well-established user address, 00000500h. During POST, the BIOS determines the amount of low RAM, and reserves the top 1KB of this RAM for itself. When the operating system or user application use the INT 12h BIOS service to determine the amount of low memory, the BIOS actually returns 1KB less than is actually present. In a desktop PC environment, the Extended BIOS Data Area usually ends at physical address 000A0000h to make room for video adapter hardware such as the VGA screen regeneration memory). In designs that do not have VGA hardware at segment A000h, additional memory can be mapped to this address space by the hardware (or possibly by the chipset), so that the BIOS can provide access to a larger amount of low memory.
1.1.1.5 Expanded Memory
In the 1980's a standard emerged for add-on memory cards that provided 64KB pages of memory within the memory range 000A0000h - 000E0000h called expanded memory. Several application programs, such as Lotus 1-2-3 and Windows for example, took advantage of this memory to store program data while they were running. This standard was primarily for application programs, but operating systems evolved to manage this memory. The BIOS, however, never manages this memory by itself (EMBEDDED BIOS does not provide any support for EMS by itself).
1.1.1.6 Video ROM Extensions
Physical address 000C0000h or 000E0000h is inspected by the BIOS during POST for the presence of a possible EGA or VGA ROM BIOS Extension. By checking for a special signature and checksumming the ROM, the BIOS determines if the ROM exists, and if so, it is invoked by the BIOS POST to initialize any video hardware that the core system BIOS is not aware of. For example, the common VGA screens used in desktop PCs are actually not directly supported by the video BIOS on the PC motherboard; instead, the video ROM BIOS Extension on the VGA controller card hooks the BIOS service (INT 10h) so that it can handle video requests instead of the system BIOS.
If a video ROM is not detected by the BIOS, and video services are enabled by the adaptation engineer, then the default video routines in the video module of the BIOS are used to provide video service for monochrome and color graphics adapters.
1.1.1.7 Other ROM Extensions
Additional ROM extensions are detected by POST during system initialization within a special address range of 000C8000h - 000EE000h at 2KB intervals using a special signature pattern and checksum technique. When valid ROM extensions are found, they are called just as video ROM extensions are called, and they perform operations as necessary to support their function. For example, SCSI disk controllers may have ROM BIOS extensions to provide basic disk services (INT 13h) so that the bootstrap process can actually boot from a SCSI device. Similarly, network interface cards (NICs) may have a remote boot ROM that gets control as a ROM extension so that it can initialize the NIC and request a download of the operating system over a network.
1.1.1.8 The System ROM
The BIOS itself is stored in ROM so that it fits neatly at the end of the 1MB address space. Typically, a 64KB ROM such as a 27C512, or a bulk Flash part such as a 28F010, is used to hold the system BIOS code itself. This code receives control at power-on reset time at physical address 000FFFF0h; this address is equivalent to the 16:16 address F000:FFF0.
On 80386 and above CPUs, the high bits of the physical address are all set, requiring the glue hardware surrounding the CPU to either double-map the 64KB ROM BIOS segment into the top of extended memory, or to disable the high bits so that the CPU really boots from the top of the lower 1MB address space.
Regardless of how the CPU gets control, the system ROM usually occupies 64KB, although the BIOS may be configured to use from 1KB to 64KB of that total file’s size with a build option. Naturally, features must be removed from a full-featured 64KB BIOS to allow its size to be reduced.
1.1.1.9 Extended Memory
Just as the BIOS sizes low memory below 1MB during POST, it also determines the amount of RAM above the 1MB address line and keeps this size in CMOS, if available. The amount of usable extended memory is returned through a BIOS software service (INT 15h, function 88h), although the BIOS does not provide any other services for managing this memory beyond simple data copying functionality (INT 15h, function 87h). The management of extended memory is the function of operating system software such as HIMEM.SYS. This driver is available in the Embedded DOS-ROM source tree.
1.1.1.10 CMOS Memory
Actually separate from the memory address space of the processor, an amount of battery-backed CMOS RAM is usually available in AT-compatible systems. In such a compatible configuration, this memory is accessed by reading and writing to I/O ports 70h and 71h.
The BIOS uses this memory to store the equipment configuration and user options associated with the operation of the BIOS, and the integrated BIOS Setup screen system is used to edit the CMOS memory in a running system.
1.1.2 Interrupt Model
In addition to defining the way memory is used in a system, EMBEDDED BIOS has an interrupt model for receiving BIOS service requests via software interrupts, handling CPU traps and faults, processing device hardware interrupts, and managing points in the IVT that point to data structures used by BIOS service modules.
The following table shows the IVT entries used by EMBEDDED BIOS. Note that some interrupts (notably, vectors 08h through 12h) are used by the BIOS although they also be be generated by the CPU in protected mode circumstances.
Vector Type Function or Service
00h CPU Divide by zero trap

01h CPU Single-step trap

02h CPU NMI interrupt

03h CPU Breakpoint trap (INT 3)

04h CPU Arithmetic overflow trap

05h CPU Array bounds exception

06h CPU Invalid Opcode Trap

07h CPU Device Not Available Trap

08h IRQ0 18.2 Hz Timer Tick

09h IRQ1 Keyboard

0ah IRQ2 Cascaded to PIC 2

0bh IRQ3 COM2 Serial Port

0ch IRQ4 COM1 Serial Port

0dh IRQ5 LPT2 Parallel Port

0eh IRQ6 Floppy Disk Controller

0fh IRQ7 LPT1 Parallel Port

10h Service Video Services

11h Service Equipment List Service

12h Service Low Memory Size Service

13h Service Floppy/IDE/ROM/Remote Disk Services

14h Service Serial Port Services

15h Service General Services, Up-Calls

16h Service Keyboard Services

17h Service Parallel Port Services

18h Up-Call Boot Fault Up-Call

19h Up-Call Bootstrap Up-Call

1ah Service Date/Time Services

1bh Up-Call Control-Break Up-Call

1ch Up-Call 18.2 Hz Application Timer Up-Call

1dh Table Pointer to Video Control Param Table

1eh Table Pointer to Diskette Parameter Table

1fh Table Pointer to Video Graphics Table

20h-3fh DOS -- reserved by DOS --

40h Redirector Floppy disk services redirected by IDE

41h Table Fixed Disk Parameter Table (Drive 80h)

42h Extension EGA Default Video Driver

43h Extension Video Graphics Characters

44h-45h N/A -- not used --

46h Table Fixed Disk Parameter Table (Drive 81h)

47h-49h N/A -- open --

4ah Up-Call User Alarm

4bh-6fh N/A -- open --

70h IRQ8 Real-Time Clock Interrupt (1 Khz)

71h IRQ9 -- open --

72h IRQ10 -- open --

73h IRQ11 -- open --

74h IRQ12 PS/2 Mouse

75h IRQ13 Math Coprocessor

76h IRQ14 IDE Drive Controller

77h IRQ15 APM Suspend Request



78h-ffh N/A -- open --
1.1.2.1 BIOS Service Interrupts
The BIOS receives requests to perform functions through software interrupts. Software interrupts, generated by the operating system or by a user application, are generated with INT nnh instructions, where nnh is a number that is assigned to a specific type of service, such as 16h for keyboard input, 10h for video output, or 13h for disk I/O.
In most cases, a BIOS service has multiple functions. For example, the disk BIOS service interrupt supports resetting the device, reading data from the media, writing data to the media, and checking the type of media inserted into the drive. For multifunction BIOS services, the requesting application places a function code in the AH CPU register, fills other registers as necessary with operands, and executes the appropriate software interrupt for the service. When the service completes, it returns to the caller to execute the instruction following the software interrupt.
Upon return, the BIOS services return status or other information in CPU registers, many times including the CPU flags register. For example, when an INT 13h disk read function is requested to read from a disk that has been removed from the drive itself, the disk BIOS returns with the carry flag set (CY) and a disk subsystem error code in the AH register. If the function were to complete successfully, then the carry flag would not be set (NC). Remember that not all BIOS services use the same return status conventions; therefore, you should consult the service reference in Chapter 22 for complete details.
1.1.2.1.1 INT 10h, Video Services
All video functions are provided through the INT 10h software interrupt mechanism. The caller provides a function code in the AH CPU register and specifies operands as appropriate for the given function in other CPU registers before issuing the INT 10h instruction.
EMBEDDED BIOS actually begins handling an INT 10h request in its CONIO module, which determines whether the video should be redirected over a serial link. This console redirection enables embedded systems that don't have a real MDA, CGA, EGA, or VGA video system to display their output via more inexpensive means. Console redirection may play a part in the final shipped embedded product, or it may simply be used during development and test in liu of an actual PC keyboard and screen.
If CONIO determines that the INT 10h service should not be redirected to a serial device, then it passes control to one of the modules that handle video controllers, such as module VIDEO, which manipulates the 6845 CRT controller registers directly to manage the display. Actual writing of data to the video screen and reading characters from the screen is accomplished by memory reads and writes to video regeneration memory, mapped into the memory address space at physical address 000b0000h for monochrome output, or 000b8000h for color output. Both monochrome and color adapters may be present in a system, in which case using the INT 10h set mode function can be used to switch between the displays.
If CONIO determines that INT 10h services should be redirected, then it calls the SERIAL module to perform the work of transmitting characters to the remote terminal equipment. In addition to writing characters to the display, the BIOS also supports the set cursor address function, and several other functions that manipulate the video display in some manner. These functions are translated to ANSI escape sequences that are transmitted to the remote terminal equipment just as other data characters via the SERIAL module's services through INT 14h.
The basic functions provided by the INT 10h BIOS are given below:
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